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Sky130 CMOS Standard Cells

sky130_fd_sc_hs

The SkyWater high speed digital standard cells library.

Logic cells

INV
AND2
AND2b
AND3
AND3b
AND4
BUF
OR2
OR2b
OR3
OR3b
OR4
AND4b
AND4bb
OR4b
OR4bb
NAND2
NAND2b
NAND3
NAND3b
NAND4
NAND4b
NOR2
NOR2b
NOR3
NOR3b
NOR4
NOR4b
NAND4bb
XOR2
XOR3
NOR4bb
XNOR2
XNOR3
MUX2
MUX2I
MUX4
MAJ3

And-Or, And-Or-Invert cells

A21O
A21OI
A21BO
A21BOI
A32O
A32OI
A22O
A22OI
A2BB2O
A2BB2OI
A211O
A211OI
A41O
A41OI
A31O
A31OI
A221O
A221OI
A311O
A311OI
A222O
A222OI
A2111O
A2111OI

Or-And, Or-And-Invert cells

O21A
O21AI
O21BA
O21BAI
O22A
O22AI
O31A
O31AI
O32A
O32AI
O41A
O41AI
O211A
O211AI
O221A
O221AI
O311A
O311AI
O2111A
O2111AI

Delay flop, delay latch cells

dfxtp
dfbbn
dfxbp
dfrbp
dfstp
dfrtn
dfrtp
dfsbp
dfbbp
dlxbn
dlxtp
dlrtn
dlrtp
dlclkp (clock gate)
dlxtn
dlxbp
dlrbn
edfxbp
dlrbp
edfxtp

Scan delay flop cells

sdlclkp
sdfbbn
sdfbbp
sdfrbp
sdfrtn
sdfrtp
sdfsbp
sdfstp
sdfxbp
sdfxtp
sedfxbp
sedfxtp

Adder cells

HA (Half adder)
FA (Full adder)
FAH (Full adder)
FAHcin (Full adder, inverted carry in)
FAHcon (Full adder, inverted carry in & out)

Delay cells

ClkBuf
dlygate4sd1
dlygate4sd2
dlygate4sd3
dlymetal6s2s
dlymetal6s4s
dlymetal6s6s
clkdlyinv5sd1
clkdlyinv5sd2
ClkInv
clkdlyinv5sd3
clkdlyinv3sd3
clkdlyinv3sd2
clkdlyinv3sd1

Tri-state, isolation, buffers cells

ebufn
einvn
einvp
Decap
BufBuf
BufInv

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Copyright © Boris Marmontel