sky130_fd_sc_hs__clkdlyinv3sd3
Clock Delay Inverter 3-stage 0.50um length inner stage gate
- Cell name: sky130_fd_sc_hs__clkdlyinv3sd3
- Type: cell
- Library: sky130_fd_sc_hs
- Inputs: 1 (A)
- Outputs: 1 (Y)
- Read the docs
-
sky130_fd_sc_hs__clkdlyinv3sd3_1
Clock Delay Inverter 3-stage 0.50um length inner stage gate