sky130_fd_sc_hdll__sdlclkp

Scan gated clock

  • Cell name: sky130_fd_sc_hdll__sdlclkp
  • Type: cell
  • Library: sky130_fd_sc_hdll
  • Inputs: 3 (SCE, GATE, CLK)
  • Outputs: 1 (GCLK)
  • Read the docs

  • sky130_fd_sc_hdll__sdlclkp_1
  • sky130_fd_sc_hdll__sdlclkp_2
  • sky130_fd_sc_hdll__sdlclkp_4

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