Generic CMOS Full Adder
Truth Table
This full adder is described in the IJARCCE paper Optimization of Half, Full and 4 Bit Ripple CarryAdders.
ABC
000 0 0
001 0 1
010 0 1
011 1 0
100 0 1
101 1 0
110 1 0
111 1 1Circuit
| Sim | A | B | C | Carry | Sum |
|---|---|---|---|---|---|
|
0 | 0 | 0 | 0 | 0 |
|
0 | 0 | 1 | 0 | 1 |
|
0 | 1 | 0 | 0 | 1 |
|
0 | 1 | 1 | 1 | 0 |
|
1 | 0 | 0 | 0 | 1 |
|
1 | 0 | 1 | 1 | 0 |
|
1 | 1 | 0 | 1 | 0 |
|
1 | 1 | 1 | 1 | 1 |
|
- | - | - | - | - |